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Hi @mattinew, thanks for your question. Python-control does not have tools to model truncation errors in fixed-point logic. There is probably software out there that can do that, but my understanding is that it can be time consuming to decide on the correct precision to use at each computation step. But more importantly, with today’s hardware, it is hard to justify the effort. Unless you are stuck using a very old processor, or extremely cost constrained, you should probably just use floating point math. For example, this chip has an Arm cortex M4 core, so it has 32-bit floating point, for less than $3.50. https://www.digikey.com/en/products/detail/microchip-technology/ATSAM4S2AB-MN/7644891 It can do a floating-point multiply in one clock cycle at 120 MHz. |
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One way to attack this would be to use describing functions, which allow you to predict possible limit cycles, including amplitude and frequency. The describing function for a quantizer can be found in Gelb and Vander Velde, Chapter 2: https://ocw.mit.edu/courses/16-30-estimation-and-control-of-aerospace-systems-spring-2004/resources/gelb_ch2_ocr/ More on describing functions in python-control here: https://python-control.readthedocs.io/en/0.10.2/nonlinear.html#describing-functions |
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Hello everyone, Thanks for your fast replies. @sawyerbfuller Unfortunately, I have no flexibility around this since I am designing an ASIC with a critical data path propagation delay, therefore there is no possibility to involve an FPU. @murrayrm I took a quick look at the links you provided, and I am sure I will learn a lot from these, thanks. Once I work this out, is there any chance I can integrate nonlinear describing functions in my I am sorry if I am missing something, thank you for your support. |
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Hello everyone,
I am trying improve a script I inherited that shows Bode plots and step/frequency response of my digital system.
This means that transfer functions are defined with:
z = control.TransferFunction.zz.dt = Tc #sampling time equal to clk periodThis is fine to achieve discrete-time system modeling, but I am still struggling to understand which the correct way is to model a custom system working in fixed-point logic, i.e. truncating bits after multiplication/filtering and so on.
This could be a great help to identify limit cycles or coefficient sizes. Thanks!
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